1. Field of the Invention
The invention relates to a semiconductor integrated circuit having a charge pump circuit.
2. Related Art
In battery-driven portable appliances, recently, a supply voltage tends to be lowered in order to realize operation for a long time at low power consumption. On the other hand, in a signal processing circuit of a semiconductor integrated circuit, it is required to output a voltage of same amplitude as that in prior art, or a voltage of larger amplitude than that in prior art. If a voltage of sufficient signal amplitude cannot be output due to the low supply voltage, by raising or lowering the voltage by a DC-DC converter, a desired DC voltage is generated in the appliance, and this DC voltage is utilized for outputting a voltage of sufficient signal amplitude.
A DC-DC converter using a charge pump circuit is widely employed in portable appliances. Further, in order to curtail a mounting area, a new semiconductor integrated circuit in which a charge pump circuit and a circuit block for processing a signal are mounted on a same substrate is put into practical use.
JP-A-2005-79828 discloses a conventional semiconductor integrated circuit including a negative voltage charge pump circuit. As shown in FIG. 13, the conventional semiconductor integrated circuit 100 includes a negative voltage charge pump circuit 11, a gate driving circuit 2 that controls the voltage to be applied to a gate terminal of the charge pump circuit 11, a circuit block 3 that performs specified signal processing in a state supplied with a positive voltage VCC and a grounding potential (GND) as a power source, a circuit block 4 that performs specified signal processing in a state supplied with the positive voltage VCC and an output voltage VSS of the charge pump circuit 11 as a power source, and a switch 5 that sets the output of the charge pump circuit 11 at low impedance by connecting the output of the charge pump circuit 11 with the GND. These internal circuits of the semiconductor integrated circuit 100 are integrated on a same substrate.
The charge pump circuit 11 is connected to both ends of a flying capacitor C1 that is used for charge by the charge pump circuit 11, and one end of an output capacitor C2 having the other end connected to the GND. The charge pump circuit 11 operates by receiving drive voltages Φ1, Φ2, Φ3, and Φ4 as clock signals in the gate terminal from the gate driving circuit 2, and outputs the output voltage VSS of negative voltage.
In the conventional semiconductor integrated circuit 100, when operating only the circuit block 3 by stopping the circuit block 4 in order to save current consumption, the operation of the circuit block 4 is set in power-saving mode and the charge pump circuit 11 is stopped. When the circuit block 4 operates, the charge pump circuit 11 is started. The conventional semiconductor integrated circuit 100 has the switch 5 that connects the output of the charge pump circuit 11 with the GND so as not to latch up when the operation of the charge pump circuit 11 is stopped, FIG. 14 shows waveforms of the output voltage VSS of the charge pump circuit 11 and the output voltage Vout of the circuit block 3 when the charge pump circuit 11 is changed in on/off mode. In FIG. 14, the charge pump circuit 11 starts operation at time T1, and the charge pump circuit 11 stops operation at time T2.
At time T1, firstly, the switch 5 is turned off from on. The charge pump circuit 11 starts to operate by starting input of specified clock signals Φ1, Φ2, Φ3, and Φ4 from the gate driving circuit 2 in a state in which the input voltage VCC is applied to the charge pump circuit 11. When the charge pump circuit 11 starts operation, the output voltage VSS of the charge pump circuit 11 drops suddenly, and reaches voltage level (−VCC). This output voltage VSS is a substrate potential of the semiconductor integrated circuit 100, and due to sudden drop of the output voltage VSS, the output voltage Vout of the circuit block 3 generates a transient negative peak voltage Vn.
At time T2, when the gate driving circuit 2 stops input of clock signals Φ1 to Φ4 to the gate terminal of the charge pump circuit 11, the charge pump circuit 11 stops repetitive operation of charging and discharging. The output voltage VSS of the charge pump circuit 11 elevates to 0 V, and accordingly the output voltage Vout of the circuit block 3 generates a transient positive peak voltage Vp.
In the conventional semiconductor integrated circuit, during operation of the circuit block 3, when the output voltage VSS of the charge pump circuit 11 changes suddenly, the substrate potential of the semiconductor integrated circuit 100 also changes suddenly. When the substrate of semiconductor integrated circuit 100 is a P type substrate, and the circuit block 3 has an NPN transistor, the voltage change of the output voltage VSS of the charge pump circuit 11 propagates to the NPN transistor through a parasitic capacitor formed between the P type substrate of the semiconductor integrated circuit 100 and the collector diffusion layer of the NPN transistor, and the potential change of the voltage VSS is superposed on the signal of the circuit block 3. For example, if the circuit block 3 is a circuit for outputting an audio signal, the signal superposed with the potential change of the voltage VSS passes through an amplifying circuit, and transient sound or other trouble is caused by the output voltage Vout shown at time T1 and T2 in FIG. 14.
In particular, if the circuit block 4 requires a high capability as negative power source, and in order to raise the current supply capability of negative power source supplied by the charge pump circuit 11, it is attempted to increase the size of transistor in the charge pump circuit 11, or to use a output capacitor C2 of less than 10 μF to suppress the mounting area of portable appliance, the charging slope of the output voltage VSS of the charge pump circuit 11 becomes steep, and transient sound or other trouble of the circuit block 3 becomes very obvious.
Although variable depending on the transistor area or gain of an amplifier, for example, in the case of semiconductor integrated circuit containing an audio signal output circuit used in general portable appliance, when the charging slope of the voltage VSS is smaller than 3 V/ms, displacement of transient sound is insignificant, and hearing trouble hardly occurs. However, when a chip capacitor of small mounting area of less than 10 μF suited to portable appliance is used as the output capacitor C2 of the charge pump circuit 11, it is very difficult to maintain a small charging slope of less than 3 V/ms in the prior art.